MSM SuperSpeed USB3.0 SoC controller

Required properties :
- compatible : should be "qcom,dwc-usb3-msm"
- reg : offset and length of the register set in the memory map
- interrupts: IRQ lines used by this controller
- interrupt-names : Required interrupt resource entries are:
	"irq" : Interrupt for DWC3 core
	"otg_irq" : Interrupt for DWC3 core's OTG Events
- <supply-name>-supply: phandle to the regulator device tree node
  Required "supply-name" examples are "SSUSB_VDDCX", "SSUSB_1p8",
  "HSUSB_VDDCX", "HSUSB_1p8", "HSUSB_3p3".
- qcom,dwc-usb3-msm-dbm-eps: Number of endpoints avaliable for
  the DBM (Device Bus Manager). The DBM is HW unit which is part of
  the MSM USB3.0 core (which also includes the Synopsys DesignWare
  USB3.0 controller)

Example MSM USB3.0 controller device node :
	usb@f9200000 {
		compatible = "qcom,dwc-usb3-msm";
		reg = <0xF9200000 0xFA000>;
		interrupts = <0 131 0 0 179 0>;
		interrupt-names = "irq", "otg_irq";
		SSUSB_VDDCX-supply = <&pm8841_s2>;
		SSUSB_1p8-supply = <&pm8941_l6>;
		HSUSB_VDDCX-supply = <&pm8841_s2>;
		HSUSB_1p8-supply = <&pm8941_l6>;
		HSUSB_3p3-supply = <&pm8941_l24>;
		qcom,dwc-usb3-msm-dbm-eps = <4>
	};
